The use of two-dimensional arrays of thin film transistors for radiation detection is well known in the prior arts. One prior art X-ray imaging detector, Multi-Element Amorphous Silicon Detector Array (MEASDA), has been provided. In this prior art detector, a scintillation material (e. g., phosphor screen or CsI) converts X-rays directly into light. The light then impinges on and partially absorbed by an array of a-Si:H photodiodes that convert the absorbed light into charge in proportional amount of absorbed light. The light-generated charges are stored on a storage capacitor and are read out through an adjacent thin film transistor as each line of the detector array is addressed.
Another prior art detector, Selenium Active Matrix Universal Read-out Array Imager (SAMURAI), has also been developed. In this prior art, the X-rays impinging on a selenium layer that converts the absorbed X-ray directly into charges. The generated charges are stored on a storage capacitor and are read out through an adjacent thin film transistor as each line of the detector array is addressed.
Both the prior arts MAESDA and SAMURAI devices require measurement of charges (or integrated current), that is proportional to impinging X-ray intensity, for each addressed row of the array. The signal-to-noise ratio of either MAESDA or SAMURAI device is, in ideal situation, proportional to the ratio of the generated charges to the noise-equivalent charges of the readout electronics. The noise-equivalent charges of the readout electronics are a product of noise of operational amplifier and the ratio of data-line capacitance to the feedback capacitance of the operational amplifier. The detailed explanation of the noise-equivalent charges of the readout electronics will be explained in the later section.
It is the purpose of this invention to improve the signal-to-noise ratio of either MAESDA or SAMURAI device by reducing the data-line capacitance and maintaining low current leakage through switching thin film transistor at the off state. One of the advantages of a higher signal-to-noise ratio is the reduction of X-ray dosage on a receiving patient so as to reduce the risk of X-ray exposure. The other advantage is to improve the image quality for better diagnostic accuracy by a physician who uses the images derived from the X-ray detector based on either MAESDA or SAMURAI.
The two-dimensional arrays of thin film transistors for radiation detection consists, typically, a switching or isolation device such as a thin film transistor associated with each element or pixel to permit individual pixels in the imager to be selectively addressed. FIG. 1 depicts the scheme of a pixel layout 140 of a prior art (the type of SAMURAI) that consists of a gate addressing line 112, a data line 110, a ground line 120, a bottom ITO (indium-tin oxide) layer 124 connected to the ground line 120 through a via hole 122, a top ITO (indium-tin oxide) layer 126 insulated from the bottom ITO by an insulating layer or a plurality of insulating layers, and the bottom-gate thin film transistor 100.
The structure of a bottom-gate thin film transistor 100 associated with each imaging element or pixel typically includes a source electrode 116 connected to the data line 110, a drain electrode 118 connected to the top ITO 126 through a via hole 123, a gate electrode 119 connected to the gate line 112, and an island of thin-film amorphous silicon (a-Si:H or other semiconductor material) 114 electrically insulated from the gate electrode 119. A thin film transistor channel 130 (part of amorphous silicon island 114) exists between the source electrode 116 and the drain electrode 118. The gate electrode 119 is placed directly below the channel 130 with an electrically insulated layer (gate insulator) placed between the gate electrode 119 and the amorphous silicon island 114. The top ITO 126 is electrically insulated from the gate line 112, the data line 110, and the ground line 120.
The charges stored in the top ITO layer 126 can be detected by a peripheral circuit 500 (shown in FIG. 7) connected to the data line 110 by turning the channel 130 into a conducting state. One example of the peripheral circuit 500 is shown in FIG. 7 where the data line 400 (equivalent to the data line 110 of FIG. 1) has a data-line capacitance, Cdata. The first stage 500 also consists of an operational amplifier 600 that has a noise of An, and a feedback capacitor 300 with a capacitance of Cf. The noise-equivalent charges, Qn, of the readout electronics can be expressed approximately asQn=An(1+Cdata/Cf)
The reduction of Cdata is an effective way to decrease Qn, thus improve the signal-to-noise ratio of the electromagnetic imaging device. Two of the major contributors to Cdata come from the capacitances between the source electrode 116 and the gate electrode 119 and between the source electrode 116 and the bottom ITO 124 or the top ITO 126 shown in FIG. 1.
FIG. 2 illustrates a cross-sectional view of the thin film transistor 100 along the line AB shown in FIG. 1. The gate electrode 119 is deposited on top of a supporting substrate preferably a glass plate 1. A gate insulating layer 5 and the amorphous silicon island 114 are deposited on top of the gate electrode 119. There exits a thin carrier-doped amorphous silicon layer 45 between the silicon island 114 and both the drain electrode 118 and the source electrode 116 to form good ohmic contacts. There usually exits a dielectric passivation layer 22 covering the source electrode 116, the drain electrode 118, and the channel 130. Current flow through the thin film transistor between the source electrode 116 and the drain electrode 118 is controlled by a voltage applied to the gate electrode 119.
One of the prior arts such as described in U.S. Pat. No. 6,011,274 to reduce the capacitance between the source electrode 116 and the top ITO 126 is shown in FIG. 2 where the source electrode 116 and the top ITO 126 are separated by two dielectric layers 22 and 23. The dielectric layer 22 is usually inorganic material such as silicon nitride of about 100 to 500 nm in thickness, and the dielectric layer 23 is usually made of organic material with a thickness from 1.5 to about 3 microns depending on its dielectric constant. The thick organic dielectric layer 23 is very effective to reduce the capacitance between the source electrode 116 and the top ITO electrode 126. Another important function of two dielectric layers 22 and 23 is to prevent the thin film transistor channel 130 from turn-on by the electric field generated by the charges stored on the top ITO electrode 126. In this way, the leakage current of thin film transistor at the off state can maintain at a low value. However, it is expensive to fabricate the thick organic dielectric layer 23 due to costs on material and process as well as low yield.
Another prior art as shown in Patent Application Publication US 2003/0010922 A1 demonstrates another way to prevent the thin film transistor channel 130 from turn-on by the electric field generated by the charges stored on the top ITO 126. FIG. 4 illustrates a cross-sectional view of the thin film transistor 101 along the line AB shown in FIG. 3. The basic idea of this prior art is illustrated in FIGS. 3, and 4, where the bottom ITO 124 shown in FIG. 1 has an extended portion into 124a shown in FIGS. 3 and 4 to cover the thin film transistor channel 130 with a dielectric passivation layer 22 between the extended portion 124a and the channel 130. In operation of the thin film transistor array, the bottom ITO 124a and 124 are connected to ground potential so that the thin film transistor channel 130 is well shielded from the charges stored at the top ITO electrode 126. However, the capacitance between the source electrode 116 and the bottom ITO 124a is rather large implying a high noise-equivalent charges, Qn, of the readout electronics.
Accordingly, a low data-line capacitance and a low leakage current of thin film transistor in the off state are important in improving overall signal-to-noise ratio of the radiation imager.